The invention relates to video data processing. More particularly, the invention relates to real time conversion of video data.
Video data encoded according to National Television Standards Committee (NTSC) standard in the United States has a frame size of 720 pixels wide by 480 pixels high and a frame rate of 30 interlaced frames per second. Other video data encoding formats exist, for example, Phase Alternation Line (PAL) and Sxc3xa9quentiel Couleurs à Mxc3xa9moire (SECAM). These formats are sometimes referred to as standard definition (SD) formats.
High definition (HD) television video data is encoded in a format that provides higher resolution than standard format video. For example, HD formats include 1280 pixel by 720 pixel progressive frames, 1920 pixel by 1080 pixel interlaced frames, or 720 pixel by 480 pixel progressive frames. HD formats are described in greater detail in xe2x80x9cATSC Digital Television Standardxe2x80x9d available from Advanced Television Systems Committee (September 1995).
Video decoding hardware such as televisions, video cassette recorders (VCRs) and other devices designed to operate with SD video data generally cannot decode HD video data. Because a large base of SD devices are currently in use and many users are unable or unwilling to upgrade SD devices to HD devices, conversion devices have been developed.
FIG. 1 is a block diagram of one conversion of high definition video data to standard definition video data. In general, conversion according to FIG. 1 is performed on frames stored in memory and the converted frames are returned to memory prior to output.
High definition video frame 110 is stored in memory 100. High definition video frame 110 can be decoded and transferred to memory 100 in any manner. Conversion circuitry and/or software 150 reads high definition video frame 110 from memory and converts the high definition frame to a standard definition frame. Conversion circuitry and/or software 150 returns standard definition video frame 120 to memory 100. Video driver 170 reads standard definition video frame 120 from memory 100 to generate output to a display device (not shown in FIG. 1).
However, the conversion of FIG. 1 requires storage of a complete HD frame in memory. If the memory is external to the conversion circuitry, each conversion incurs additional latency to access memory twice (one read and one write). If the memory and the conversion circuitry are included on the same integrated circuit chip, the cost of the integrated circuit is increased. What is needed is an improved method and apparatus for conversion of video data.
A method and apparatus for conversion of video data is described. A stream of video data encoded according to a source format is converted to a stream of video data encoded according to a destination format. The video data encoded according to the destination format is stored in a buffer. An output stream of video data is generated from data stored in the buffer, wherein access to the data in the buffer is triggered when the data stored in the buffer reaches a threshold value.
In one embodiment, the threshold value is determined based, at least in part, on a horizontal scaling factor and a vertical scaling factor from the source format to the destination. In one embodiment, the threshold value is determined based, at least in part, on a vertical region of interest within the video data encoded according to the source format.